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________________general description the max1703 is a high-efficiency, low-noise, step-up dc-dc converter intended for use in battery-powered wireless applications. it uses a synchronous-rectified pulse-width-modulation (pwm) boost topology to gen- erate a 2.5v to 5.5v output from battery inputs, such as one to three nicd/nimh cells or one li-ion cell. the device includes a 2a, 75m , n-channel mosfet switch and a 140m , p-channel synchronous rectifier. with its internal synchronous rectifier, the max1703 delivers up to 5% better efficiency than similar nonsyn- chronous converters. it also features a pulse-frequency- modulation (pfm) low-power mode to improve efficiency at light loads, and a 1? shutdown mode. the max1703 comes in a 16-pin narrow so package and includes an uncommitted comparator that generates a power-good or low-battery-warning output. it also contains a linear gain block that can be used to build a linear regulator. for lower-power outputs and a smaller package, refer to the max1700/max1701. for dual outputs (step-up plus linear regulator), refer to the max1705/max1706. for an on-board analog-to-digital converter, refer to the max848/max849. the max1703 evaluation kit is available to speed designs. ____________________________features ? up to 95% efficiency ? up to 1.5a output ? fixed 5v or adjustable step-up output (2.5v to 5.5v) ? 0.7v to 5.5v input range ? low-power mode (300?) ? low-noise, constant-frequency mode (300khz) ? synchronizable switching frequency (200khz to 400khz) ? 1? logic-controlled shutdown ? power-good comparator ? uncommitted gain block ________________________applications digital cordless phones personal communicators pcs phones palmtop computers wireless handsets hand-held instruments two-way pagers max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter ________________________________________________________________ maxim integrated products 1 19-1336; rev 2; 11/98 evaluation kit manual follows data sheet ordering information typical operating circuit part temp. range pin-package MAX1703ESE -40? to +85? 16 narrow so pgnd gnd fb pout out lxp, lxn off input 0.7v to 5.5v or on sync pwm pfm output 5v or adj up to 1.5a clk/ sel on pokin pok ao ain ref power-good input power-good output gain-block input gain-block output max1703 pin configuration 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 ref on pout lxp pout pgnd lxn pgnd clk/sel top view max1703 narrow so fb pokin ain out gnd ao pok for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. for small orders, phone 1-800-835-8769.
switch on-resistance max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (clk/sel = ain = on = pokin = fb = pgnd = gnd, out = pout, lxp = lxn, v out = 5.3v (note 1), t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. out, on , ao, pok to gnd .....................................-0.3v to +6v pgnd to gnd.....................................................................?.3v lxp, lxn to pgnd .................................-0.3v to (v pout + 0.3v) pout, clk/sel, ain, ref, fb, pokin to gnd.......................................-0.3v to (v out + 0.3v) continuous power dissipation (t a = +70?) narrow so (derate 8.70mw/? above +70?) .............696mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +160? lead temperature (soldering, 10sec) .............................+300? i load < 1ma, t a = +25? (note 3) clk/sel = gnd clk/sel = gnd (note 2) clk/sel = out n-channel v on = v lxn = v out = 5.5v on = out clk/sel = out, no load to full load v lxp = 0v, v out = v on = 5.5v (note 5) v out = 1.5v v fb < 0.1v, clk/sel = out, 0 i lx 1.1a, v batt = 3.7v adjustable output, clk/sel = out, 0 i lx 1.1a, v batt = 2.2v, v out = 3.3v clk/sel = out (note 1) v fb = 1.25v clk/sel = gnd (note 1) conditions ma 20 160 260 p-channel turn-off current ma 500 800 1100 n-channel current limit ma 2200 2700 3200 0.075 0.13 0.14 0.25 ? 0.1 20 lxn leakage current ? 0.1 20 pout, lxp leakage current ? 150 300 supply current in low-noise mode ? 65 120 supply current in low-power mode v 0.9 1.1 minimum start-up voltage v 0.7 5.5 input supply range ? 0.1 20 supply current in shutdown % -1.6 load regulation (note 6) v 2.0 2.15 2.3 output voltage lockout threshold v 2.5 5.5 output voltage adjust range khz 40 140 300 frequency in start-up mode v 4.87 5.05 5.20 output voltage (note 4) v 1.21 1.24 1.255 fb regulation voltage na 0.1 20 fb input current units min typ max parameter p-channel 0.13 0.25 switch on-resistance clk/sel = gnd clk/sel = out rising v pokin v 1.225 1.250 1.275 pokin trip level v pokin = 0.7v na -20 20 pokin input current i sink (pok) = 1ma, v out = 3.6v or i sink (pok) = 20?, v out = 1v v 0.03 0.4 pok low voltage v out = v pok = 5.5v ? 0.01 1 pok high leakage current dc-dc converter dc-dc switches power-good comparator
v max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter _______________________________________________________________________________________ 3 electrical characteristics (continued) (clk/sel = ain = on = pokin = fb = pgnd = gnd, out = pout, lxp = lxn, v out = 5.3v (note 1), t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) clk/sel = out, v fb = 0.5v clk/sel = out, v fb = 0.5v on , clk/sel clk/sel, v out = 5.5v clk/sel, v out = 2.5v on , 1.2v < v out < 5.5v (note 7) v ain = 1.5v, v ao = 5.5v v ain = 0.5v, i ao = 100? 2.5v < v out < 5.5v -1? < i ref < 50? 10? < i ao < 100? v ain = 1.5v i ref = 0? i ao = 20? conditions khz 200 400 external clock frequency range % 80 86 90 oscillator maximum duty cycle khz 260 300 340 internal oscillator frequency ? -1 0.01 1 logic input current v 0.8v out input high voltage v 0.2v out input low voltage 0.2v out mv 0.2 5 ref supply rejection mv 515 ref load regulation v 1.237 1.250 1.263 reference output voltage ? 0.01 1 ao output high leakage v 0.1 0.4 ao output low voltage mmho 51016 transconductance na -30 30 ain input current v 1.237 1.25 1.263 ain reference voltage units min typ max parameter ns 100 maximum clk/sel rise/fall time ns 200 minimum clk/sel pulse width electrical characteristics (clk/sel = ain = on = pokin = fb = pgnd = gnd, out = pout, lxp = lxn, v out = 5.3v (note 1), t a = -40? to +85? , unless otherwise noted. typical values are at t a = +25?.) (note 8) on = out (note 5) v fb < 0.1v, clk/sel = out, 0 i lx 1.1a, v batt = 3.7v adjustable output, clk/sel = out, 0 i lx 1.1a, v out = 3.3v, v batt = 2.2v clk/sel = out (note 1) clk/sel = gnd (note 1) conditions ? 300 supply current in low-noise mode ? 120 supply current in low-power mode ? 20 supply current in shutdown v 2.0 2.3 output voltage lockout threshold v 4.87 5.20 output voltage (note 4) v 1.20 1.27 fb regulation voltage units min typ max parameter dc-dc converter on , 1.2v < v out < 5.5v 0.8v out gain block reference logic inputs
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 4 _______________________________________________________________________________________ electrical characteristics (continued) (clk/sel = ain = on = pokin = fb = pgnd = gnd, out = pout, lxp = lxn, v out = 5.3v (note 1), t a = -40? to +85? , unless otherwise noted. typical values are at t a = +25?.) (note 8) clk/sel = gnd clk/sel = out clk/sel = gnd clk/sel = out n-channel conditions p-channel rising v pokin v 1.225 1.275 pokin trip level 0.25 switch on-resistance ma 500 1100 n-channel current limit ma 2200 3600 0.13 i ao = 20? 0.25 v 1.23 1.27 ain reference voltage units min typ max parameter note 1: supply current from the 5.05v output is measured between the 5.05v output and the out pin. this current correlates directly to the actual battery supply current, but is reduced in value according to the step-up ratio and efficiency. set v out = 5.3v to keep the internal switch open when measuring the device operating current. note 2: minimum operating voltage. since the regulator is bootstrapped to the output, once started it will operate down to a 0.7v input. note 3: start-up is tested with the circuit of figure 2. note 4: in low-power mode (clk/sel = gnd) the output voltage regulates 1% higher than low-noise mode (clk/sel = out or synchronized). note 5: the regulator is in start-up mode until this voltage is reached. do not apply full-load current below this voltage. note 6: load regulation is measured from no-load to full load, where full load is determined by the n-channel switch current limit. note 7: the on input has a total hysteresis of approximately 0.15 x v out . note 8: specifications to -40? are guaranteed by design and not production tested. 10? < i ao < 100? mmho 516 transconductance i ref = 0? v 1.23 1.27 reference output voltage clk/sel = out, v fb = 0.5v khz 260 340 internal oscillator frequency clk/sel = out, v fb = 0.5v % 80 92 oscillator maximum duty cycle dc-dc switches power-good comparator gain block reference logic inputs
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter _______________________________________________________________________________________ 5 100 40 0.1 1 10 100 1000 10,000 efficiency vs. load current (v out = 5v) 50 max1703-01 load current (ma) efficiency (%) 60 80 70 90 v in = 3.6v v in = 2.4v v in = 1.2v pfm pwm 100 40 0.1 1 10 100 1000 10,000 efficiency vs. load current (v out = 3.3v) 50 max1703-02 load current (ma) efficiency (%) 60 80 70 90 v in = 2.4v v in = 1.2v v in = 0.9v pfm pwm 0 1 2 3 4 034 12 56 no-load battery current vs. input voltage max1703-03 input voltage (v) battery current (ma) t a = +85? low-power mode t a = +25? t a = -40? 0 0.5 1.0 2.0 1.5 2.5 0.5 3.0 3.5 4.0 1.0 1.5 2.0 2.5 4.5 5.0 5.5 shutdown supply current vs. input voltage max1703-04 input voltage (v) shutdown current ( m a) t a = +85? includes all external component leakages. capacitor leakage dominates at t a = +85? t a = +25?, t a = -40? 1.2460 1.2470 1.2490 1.2480 1.2500 1.2510 1.2520 0 4050 6070 10 20 30 80 90 reference voltage vs. reference current max1703-07 reference current ( m a) reference voltage (v) v in = 3.6v v out = 5v low-power mode 2.0 0.6 0.01 0.1 1 10 100 1000 start-up voltage vs. load current 0.8 max1703-05 load current (ma) start-up voltage (v) 1.0 1.2 1.6 1.4 1.8 v out = 5v pwm mode 1.2450 1.2490 1.2470 1.2510 1.2530 1.2550 -40 20 40 60 -20 0 80 100 reference voltage vs. temperature max1703-06 temperature (?) reference voltage (v) 9 100 1k 10k 100k 1m 10m noise spectrum 1 0 -1 max1703-14 frequency (hz) noise (mv rms ) 2 6 7 5 4 3 8 v out = 5v v in = 3.6v i load = 500ma __________________________________________typical operating characteristics (v in = +3.6v, v out = 5v, t a = +25?, unless otherwise noted.)
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 6 _______________________________________________________________________________________ _________________________________t ypical operating characteristics (continued) (v in = +3.6v, v out = 5v, t a = +25?, unless otherwise noted.) 260 290 280 270 310 300 320 330 340 -40 20 40 60 -20 0 80 100 frequency vs. temperature max1703-15 temperature (?) frequency (khz) v out = 5v v out = 3.3v 0.5 1.5 1.0 2.5 2.0 3.0 3.5 2.5 4.0 4.5 3.0 3.5 5.0 5.5 peak inductor current limit vs. output voltage max1703-16 output voltage (v) current limit(a) pwm low power (pfm) 2 m s/div i load = 1.5a, c7 = 0.47 m f heavy load switching max1703-08 2ms/div v out is ac coupled load current = 0a to 1.5a v out (50mv/div) 1.0a 0.5a 0a load-transient response max1703-10 2ms/div v in = 2.6v to 3.6v, v out is ac coupled v out (50mv/div) v in 4v 2v 0v line-transient response max1703-09 1ms/div v in = 2.6v to 3.6v, v out is ac coupled v on v out (2v/div) i in (0.2a/div) power-on delay (pfm mode) max1703-11
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter _______________________________________________________________________________________ 7 pin description _________________________________t ypical operating characteristics (continued) (v in = +3.6v, v out = 5v, t a = +25?, unless otherwise noted.) 1ms/div v in = 3.6v, v out = 5v, c out = 470 m f, pulse width = 577 m s, load current = 100ma to 1a v out (100mv/div) i load (0.5a/div) gsm load-transient response max1703-12 2ms/div v in = 1.2v, v out = 3.3v, c out = 470 m f, pulse width = 416 m s, load current = 50ma to 400ma v out (100mv/div) i load (0.2a/div) dect load-transient response max1703-13 pin dual-mode feedback input. connect fb to ground to set a fixed output voltage of +5v. connect a divider between the output voltage and gnd to set the output voltage from 2.5v to 5.5v. fb 2 reference output. bypass with a 0.22? bypass capacitor to gnd. ref 1 function name dc-dc converter output. power source for the ic. out 4 power-good comparator input. threshold is 1.250v, with 1% hysteresis on the threshold? rising edge. pokin 3 power-good comparator output. this open-drain n-channel output is low when v pokin < 1.250v. pok 8 gain-block output. this open-drain output sinks current when v ain < v ref . ao 7 gain-block input. when ain is low, ao sinks current. the nominal transconductance from ain to ao is 10mmhos. ain 6 ground gnd 5 source of p-channel synchronous rectifier mosfet switch. connect an external schottky diode from lxn and lxp to pout. pout 13, 15 source of n-channel power mosfet switch pgnd 10, 12 on/off input. when on is low, the ic turns on. on 16 switch-mode selection and external-clock synchronization input: clk/sel = low: low-power, low-quiescent-current pfm mode. delivers up to 10% of full load current. clk/sel = high: high-power pwm mode. full output power available. operates in low-noise, constant- frequency mode. clk/sel = external clock: high-power pwm mode with the internal oscillator synchronized to the exter- nal clk turning on with clk/sel = 0v also serves as a soft-start function, since peak inductor current is limited to 25% of that allowed in pwm mode. clk/sel 9 dual mode is a trademark of maxim integrated products. drain of n-channel power switch. connect lxp to lxn. lxn 11 drain of p-channel synchronous rectifier. connect lxp to lxn. lxp 14
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 8 _______________________________________________________________________________________ _______________detailed description the max1703 is a highly efficient, low-noise power supply for portable rf and data-acquisition instru- ments. it combines a boost switching regulator, n- channel power mosfet, p-channel synchronous rectifier, precision reference, shutdown control, versa- tile gain block, and power-good (pok) comparator (figure 1) in a 16-pin narrow so package. the switching dc-dc converter boosts a 1- to 3-cell input to a fixed 5v or an adjustable output between 2.5v and 5.5v. typically the max1703 starts from a low, 0.9v input and remains operational down to 0.7v. the max1703 is optimized for use in cellular phones and other applications requiring low noise during full- power operation, as well as low quiescent current for maximum battery life in low-power mode and shut- down. it features constant-frequency (300khz), low- noise pwm operation with up to 1.5a output capability. see table 1 for typical outputs. a low-quiescent-cur- rent, low-power mode offers an output up to 150ma and reduces quiescent power consumption to 300?. in shutdown mode, the quiescent current is further reduced to just 1?. figure 2 shows the standard appli- cation circuit for the max1703. 2.15v ic power 1.25v dual mode/ fb out reference undervoltage lockout start-up oscillator 300khz oscillator pfm/pwm controller pfm/pwm p n en d en pout lxn lxp pgnd comparator osc mode fb en q q q out ref fb pokin gnd clk/sel on rdy ref ref on out max1703 pok n gain block ref ao n ain figure 1. functional block diagram
table 1. typical available output current additional features include synchronous rectification for high efficiency and improved battery life, and an uncommitted comparator (pok) for monitoring the reg- ulator? output or battery voltage. the max1703 also includes a gain block that can be used to build a linear regulator using an external p-channel mosfet pass device; this gain block can also function as a second comparator. a clk input allows frequency synchro- nization to reduce interference. table 2. selecting the operating mode step-up converter the step-up switching dc-dc converter generates an adjustable output from 2.5v to 5.5v. the internal n- channel mosfet switch is turned on during the first part of each cycle, allowing current to ramp up in the inductor and store energy in a magnetic field. during the second part of each cycle, when the mosfet is turned off, the voltage across the inductor reverses and forces current through the diode and synchronous rec- tifier to the output filter capacitor and load. as the ener- gy stored in the inductor is depleted, the current ramps down and the output diode and synchronous rectifier turn off. depending on the clk/sel pin setting, voltage across the load is regulated using either low-noise pwm or low-power operation (table 2). low-noise pwm operation when clk/sel is pulled high, the max1703 operates in a high-power, low-noise pwm mode. during pwm operation, the max1703 switches at a constant fre- quency (300khz), and modulates the mosfet-switch pulse width to control the power transferred per cycle and regulate the voltage across the load. in pwm mode the device can output up to 1.5a. switching harmonics generated by fixed-frequency operation are consistent and easily filtered. see the noise spectrum plot in the typical operating characteristics . during pwm operation, each of the internal clock? ris- ing edges sets a flip-flop, which turns on the n-channel mosfet switch (figure 3). the switch turns off when the sum of the voltage-error, slope-compensation, and current-feedback signals trips a multi-input comparator and resets the flip-flop; the switch remains off for the rest of the cycle. when a change occurs in the output voltage error signal, the comparator shifts the level to which the inductor current ramps during each cycle. a second comparator enforces an inductor current limit of 2.7a (typical). max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter _______________________________________________________________________________________ 9 2.4 2 nicd/nimh 2.4 3.6 3 nicd/nimh no. of cells 1.2 1 nicd/nimh input voltage (v) 5.0 3.3 5.0 3.3 output voltage (v) 950 1400 1600 600 output current (ma) gnd pgnd ao pout out lxp, lxn d1 c1 100 m f mbr0520l v batt c4 2 x 220 m f l1 4.7 m h pok fb ref clk/sel on ain pokin c3 0.22 m f r3 r4 c2 0.22 m f note: heavy lines indicate high-current paths. c5 0.22 m f r5 10 w max1703 signal ground power ground figure 2. max1703 in high-power pwm mode synchronized pwm external clock (200khz to 400khz) pwm 1 low power mode 0 clk/sel low noise, high output current low noise, high output current low supply current features
max1703 synchronized pwm operation the max1703 can be synchronized in pwm mode to a 200khz to 400khz frequency by applying an external clock to clk/sel. this allows the user to set the har- monics to avoid if bands in wireless applications. the synchronous rectifier is also active during synchronized pwm operation. low-power pfm operation pulling clk/sel low places the max1703 in a low- power mode. during low-power mode, pfm operation regulates the output voltage by transferring a fixed amount of energy during each cycle, and then modulat- ing the pulse frequency to control the power delivered to the output. the devices switch only as needed to service the load, resulting in the highest possible effi- ciency at light loads. output current capability in pfm mode is 150ma (max). the output voltage is typically 1% higher than in pwm mode. during pfm operation, the error comparator detects the output voltage falling out of regulation and sets a flip- flop, which turns on the n-channel mosfet switch (figure 4). when the inductor current ramps to the pfm mode current limit (800ma typical) and stores a fixed amount of energy, the current-sense comparator resets a flip-flop. the flip-flop turns off the n-channel switch and turns on the p-channel synchronous rectifier. a second flip-flop, previously reset by the switch? ?n?sig- nal, inhibits the error comparator from initiating another cycle until the energy stored in the inductor is transferred to the output filter capacitor and the synchronous rectifier current has ramped down to 80ma. this forces operation with a discontinuous inductor current. synchronous rectifier the max1703 features an internal 140m , p-channel synchronous rectifier to enhance efficiency. synchro- nous rectification provides a 5% efficiency improve- ment over similar nonsynchronous boost regulators. in pwm mode, the synchronous rectifier is turned on dur- ing the second half of each switching cycle. in low- power mode, an internal comparator turns on the synchronous rectifier when the voltage at lx exceeds the boost regulator output, and then turns it off when the inductor current drops below 80ma. low-voltage start-up oscillator the max1703 uses a cmos, low-voltage start-up oscil- lator for a 1.1v guaranteed minimum start-up input volt- age at +25?. on start-up, the low-voltage oscillator switches the n-channel mosfet until the output volt- age reaches 2.15v. above this level, the normal boost- converter feedback and control circuitry take over. once the device is in regulation, it can operate down to a 0.7v input, since internal power for the ic is boot- strapped from the output via the out pin. do not apply full load until the output exceeds 2.3v (max). 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 10 ______________________________________________________________________________________ 2.7a typ current limit osc fb r q s ref lxp lxn pout pgnd p n figure 3. simplified pwm controller block diagram error comparator fb ref 800ma typ current limit logic high pout p n pgnd s s q r d q r lxp lxn figure 4. controller block diagram in low-power pfm mode
shutdown the max1703 shuts down to reduce quiescent current to 1?. during shutdown ( on = v out ), the reference, low-battery comparator, gain block, and all feedback and control circuitry are off. the boost converter? out- put drops to one schottky diode drop below the input. power-good (pok) comparator the max1703 features an uncommitted pok compara- tor. the internal pok comparator has an open-drain output (pok) capable of sinking 1ma. when the input (pokin) rises above the 1.25v reference, the pok open-drain output turns off. the pokin input has 10mv of hysteresis. to provide a power-good signal, connect the pokin input to an external resistor-divider between out and gnd (figure 5). calculate the resistor values as follows: r3 = r4(v th / v ref - 1) where v th is the desired input voltage trip threshold. since the input bias current into pokin is less than 20na, r4 can be a large value (such as 270k or less) without sacrificing accuracy. connect the resistor volt- age-divider as close to the ic as possible, within 0.2in. (5mm) of pokin. reference the max1703 has an internal 1.250v, 1% bandgap ref- erence. connect a 0.22? bypass capacitor to gnd within 0.2in. (5mm) of the ref pin. ref can source up to 50? of external load current. gain block the max1703 gain block can function as a second comparator, or can be used to build a linear regulator using an external p-channel mosfet pass device. the gain-block output is a single-stage transconductance amplifier that drives an open-drain n-channel mosfet. the g m of the entire gain-block stage is 10mmho. figure 6 shows the gain block used in a linear-regulator application. the output of an external p-channel pass element is compared to the internal reference. the dif- ference is amplified and used to drive the gate of the pass element. use a logic-level pfet, such as an nds336p (r ds(on) = 270m ) from fairchild. this con- figuration allows ripple reduction at the output. if a lower r ds(on) pfet is used, then the linear regulator output filter capacitance may need to be increased. to use the gain block as a comparator, refer to the power-good (pok) comparator section. max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter ______________________________________________________________________________________ 11 gnd pgnd ao pout out lxp, lxn d1 mbr0520l output c1 100 m f v in c4 2 x 220 m f l1 4.7 m h pok fb ref clk/sel on ain pokin c3 0.22 m f r3 r4 c2 0.22 m f note: heavy lines indicate high-current paths. c5 0.22 m f r5 10 w r2 r1 max1703 signal ground power ground figure 5. adjustable output (pwm mode) gnd pgnd ao pout out lxp, lxn c1 100 m f mbr0520l boost output 47 m f linear regulated output r6 20k c5 0.22 m f c4 330 m f r5 10 w c2 0.22 m f v in l1 4.7 m h pok fb ref clk/sel on ain pokin r3 r4 r2 100k r1 max1703 p signal ground power ground figure 6. using the gain block as a linear regulator
max1703 __________________design procedure setting the output voltages set the output voltage between 2.5v and 5.5v by con- necting a resistor voltage-divider to fb from out to gnd, as shown in figure 2. the resistor values are then as follows: r1 = r2(v out / v fb - 1) where v fb , the boost-regulator feedback setpoint, is 1.24v. since the input bias current into fb is less than 20na, r2 can have a large value (such as 270k or less) without sacrificing accuracy. connect the resistor voltage-divider as close to the ic as possible, within 0.2in. (5mm) of the fb pin. inductor selection the max1703? high switching frequency allows the use of a small surface-mount inductor. a 4.7? induc- tor should have a saturation-current rating that exceeds the n-channel switch current limit. however, it is gener- ally acceptable to bias the inductor current into satura- tion by as much as 20%, although this will slightly reduce efficiency. for high efficiency, choose an induc- tor with a high-frequency core material, such as ferrite, to reduce core losses. to minimize radiated noise, use a toroid, pot core, or shielded bobbin inductor. see table 3 for suggested components and table 4 for a list of component suppliers. connect the inductor from the battery to the lx pins as close to the ic as possible. output diode use a schottky diode such as a 1n5817, mbr0520l, or equivalent. the schottky diode carries current during both start-up and pfm mode after the synchronous recti- fier turns off. thus, its current rating only needs to be 500ma. connect the diode between lxn/lxp and pout, as close to the ic as possible. do not use ordi- nary rectifier diodes, since slow switching speeds and long reverse recovery times will compromise efficiency and load regulation. input and output filter capacitors choose input and output filter capacitors that will ser- vice the input and output peak currents with accept- able voltage ripple. choose input capacitors with working voltage ratings over the maximum input volt- age, and output capacitors with working voltage ratings higher than the output. a 330?, 100m , low-esr tantalum capacitor is recom- mended for a 5v output. for full output load current, one 470? or two 220?, 100m low-esr tantalum capacitors are recommended for a 3.3v output. the input filter capacitor (c in ) also reduces peak currents drawn from the input source and reduces input switch- ing noise. the input voltage source impedance deter- mines the required size of the input capacitor. when operating directly from one or two nicd cells placed close to the max1703, use a 100?, low-esr input filter capacitor. sanyo os-con and panasonic sp/cb-series ceramic capacitors offer the lowest esr. low-esr tantalum capacitors are a good choice and generally offer a good tradeoff between price and performance. do not exceed the ripple current ratings of tantalum capaci- tors. avoid most aluminum-electrolytic capacitors, because their esr is often too high. 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 12 ______________________________________________________________________________________ sanyo os-con series sumida rch654 series through hole matsuo 267 series capacitors 1n5817 diodes production inductors table 3. component selection guide table 4. component suppliers (714) 960-6492 usa: (714) 969-2491 matsuo (847) 639-1469 usa: (847) 639-6400 coilcraft (803) 626-3123 fax supplier usa: (803) 946-0690 (800) 282-4975 avx phone nichicon pl series sprague 595d series (602) 994-6430 usa: (602) 303-5454 motorola (619) 661-1055 81-7-2070-1174 usa: (619) 661-6835 japan: 81-7-2070-6306 sanyo (847) 956-0702 81-3-3607-5144 usa: (847) 956-0666 japan: 81-3-3607-5111 sumida sumida cdr125 avx tps series surface mount motorola mbr0520l coilcraft do3316
bypass capacitors a few ceramic bypass capacitors are required for proper operation. bypass ref with a 0.22? capacitor to gnd. connect a 0.22? ceramic capacitor from out to gnd. each of these should be placed as close to their respec- tive pins as possible, within 0.2in. (5mm) of the dc-dc converter ic. see table 4 for suggested suppliers. __________ applications information intermittent supply/battery connections when boosting an input supply connected via a mechanical switch, or a battery connected via spring contacts, input power may sometimes be intermittent as a result of contact bounce. when operating in pfm mode with input voltages greater than 2.5v, restarting after such dropouts may initiate high current pulses that interfere with the max1703? internal mosfet switch control. if contact or switch bounce is anticipated in the design, use one of the following solutions: 1) connect a capacitor (c on ) from on to v in and a 1m resistor (r on ) from on to gnd, as shown in figure 7. this resistor-capacitor network differenti- ates fast input edges at v in and momentarily holds the ic off until v in settles. the appropriate value of c on is 10 -5 times the total output filter capacitance (c out ), so a c out of 440? results in c on = 4.7nf. 2) use the system microcontroller to hold the max1703 in shutdown from the time when power is applied (or reapplied) until c out has charged to at least the input voltage. standard power-on-reset times accomplish this. 3) ensure that the ic operates, or at least powers up, in pwm mode (clk/sel = high). activate pfm mode only after the output voltage has settled and all of the system? power-on-reset flags are cleared. use in a typical wireless phone application the max1703 is ideal for use in digital cordless and pcs phones. the power amplifier (pa) is connected directly to the boost-converter output for maximum volt- age swing (figure 8). low-dropout linear regulators are used for post-regulation to generate low-noise power for dsp, control, and rf circuitry. typically, rf phones spend most of their life in standby mode with only short periods in transmit/receive mode. during standby, max- imize battery life by setting clk/sel = 0; this places the ic in low-power mode (for the lowest quiescent power consumption). see gain block section for infor- mation on configuring an external mosfet as a linear regulator. designing a pc board high switching frequencies and large peak currents make pc board layout an important part of design. poor design can cause excessive emi and ground bounce, both of which can cause instability or regula- tion errors by corrupting the voltage and current feed- back signals. power components?uch as the inductor, converter ic, filter capacitors, and output diode?hould be placed as close together as possible, and their traces should be kept short, direct, and wide. a separate low- noise ground plane containing the reference and signal grounds should only connect to the power-ground plane at one point. this minimizes the effect of power- ground currents on the part. keep the voltage feedback network very close to the ic, within 0.2in. (5mm) of the fb pins. keep noisy traces, such as from the lx pin, away from the voltage feedback networks and separated from them using grounded copper. consult the max1703 ev kit for a full pc board example. soft-start to implement soft-start, set clk/sel low on power-up; this forces pfm operation and reduces the peak switching current to 800ma max. once the circuit is in regulation and start-up transients have settled, clk/sel can be set high for full-power operation. max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter ______________________________________________________________________________________ 13 out pout lxp, lxn c out 2 x 220 m f 11, 14 16 4 15, 13 c on 4.7nf r on 1m on max1703 figure 7. connecting c on and r on when switch or battery- contact bounce is anticipated
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 14 ______________________________________________________________________________________ ___________________chip information transistor count: 554 substrate connected to gnd lx pout ldos max8865/max8866 radio m c pa max1703 figure 8. typical phone application
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter ______________________________________________________________________________________ 15 ________________________________________________________package information soicn.eps
max1703 1-cell to 3-cell, high-power (1.5a), low-noise, step-up dc-dc converter 16 ______________________________________________________________________________________ notes

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